Hey who remembers anything about circuit board design for protection against EMP. I am thinking that standard best practices for protection against ESD / EFT / Surge protection should go a long way in mitigating damage but I haven’t dealt with EMP since my Electromagnetics class years ago. I know that DoD has Mil Std 188- something out there for facilities and IEC has a TR 61000-5-3 but I can’t find anything specific on circuit board design.
This was brought up by a post at Daily Pundit. I think that people tend to overstate the damage an EMP attack would do. Not that I
don’t think such an attack would wouldn’t be devastating but that I don’t see the 90 to 100% destruction that people seem to associate with such an attack.
Update The 2008 EMP Commission found a 100% failure rate on IBM compatible computers, but not 100% destruction, from an E1 pulse. Reading between the lines I would say that these were Performance Criteria B and C failures (recover without user intervention / recover with user intervention (reboot)). This is significant because if control systems survive that lessens the difficulty in recovery.